CS2354 - Advanced Computer Architecture - Syllabus

CS2354 ADVANCED COMPUTER ARCHITECTURE - Syllabus

L T P C

3 0 0 3

UNIT I INSTRUCTION LEVEL PARALLELISM 9

ILP – Concepts and challenges – Hardware and software approaches – Dynamic

scheduling – Speculation - Compiler techniques for exposing ILP – Branch prediction.

UNIT II MULTIPLE ISSUE PROCESSORS 9

VLIW & EPIC – Advanced compiler support – Hardware support for exposing parallelism

– Hardware versus software speculation mechanisms – IA 64 and Itanium processors –

Limits on ILP.

UNIT III MULTIPROCESSORS AND THREAD LEVEL PARALLELISM 9

Symmetric and distributed shared memory architectures – Performance issues –

Synchronization – Models of memory consistency – Introduction to Multithreading.

UNIT IV MEMORY AND I/O 9

Cache performance – Reducing cache miss penalty and miss rate – Reducing hit time –

Main memory and performance – Memory technology. Types of storage devices –

Buses – RAID – Reliability, availability and dependability – I/O performance measures –

Designing an I/O system.

UNIT V MULTI-CORE ARCHITECTURES 9

Software and hardware multithreading – SMT and CMP architectures – Design issues –

Case studies – Intel Multi-core architecture – SUN CMP architecture - heterogenous

multi-core processors – case study: IBM Cell Processor.

TOTAL : 45 PERIODS

56

TEXT BOOK:

1. John L. Hennessey and David A. Patterson, “ Computer architecture – A quantitative

approach”, Morgan Kaufmann / Elsevier Publishers, 4th. edition, 2007.

REFERENCES:

1. David E. Culler, Jaswinder Pal Singh, “Parallel computing architecture : A

hardware/software approach” , Morgan Kaufmann /Elsevier Publishers, 1999.

2. Kai Hwang and Zhi.Wei Xu, “Scalable Parallel Computing”, Tata McGraw Hill, New

Delhi, 2003.