Samsung Pays Apple $1 Billion Sending 30 Trucks Full of 5 Cents Coins

On 24^th november more than 30 trucks filled with 5-cent coins arrived at Apple’s headquarters in California. Initially, the security company that protects the facility said the trucks were in the wrong place, but minutes later, Tim Cook (Apple CEO) received a call from Samsung CEO explaining that they will pay $1 billion dollars for the fine recently ruled against the South Korean company in this way.

The funny part is that the signed document does not specify a single payment method, so Samsung is entitled to send the creators of the iPhone their billion dollars in the way they deem best. 

 

his dirty but genius geek troll play is a new headache to Appleexecutives as they will need to put in long hours counting all that money, to check if it is all there and to try to deposit it crossing fingers to hope a bank will accept all the coins.

Lee Kun-hee, Chairman of Samsung Electronics, told the media that his company is not going to be intimidated by a group of “geeks with style” and that if they want to play dirty, they also know how to do it.

You can use your coins to buy refreshments at the little machine for life or melt the coins to make computers, that’s not my problem, I already paid them and fulfilled the law.

A total of 20 billion coins, delivery hope to finish this week.

Let’s see how Apple will respond to this.

Reference: Google Search

CS2060-HSN - 2 Marks Q&A

Two Mark Question and Answer

SUBJECT NAME: CS2060 & HIGH SPEED NETWORKS

UNIT I

1. Define ISDN?
The integrated services digital network is to provide a unique user network interface (UNI) for the support of the basic set of narrow band(NB) services that is voice and low speed data thus providing a narrowband integrated access.

2. What are the features of an ISDN?
1. Standard user network interface (UNI)
2. Integrated digital transport
3.Service integration
4. Intelligent network services

3. What is constant bit rate (CBR)?
CBR is used to provide circuit emulation services. The corresponding bandwidth allocated on the peak of the traffic sources so that a virtually loss free communication service is obtained with prescribed targets of cell transfer
delay (CTD) and cell delay variation (CDV)


4. What is available bit rate (ABR)?
It is used to support data traffic sources. In this class a minimum bandwidth can be required by the source that is guaranteed by the network. The service is supported with the guarantee of CLR or CTD.

5. What is unspecified bit rate (UBR)?
It is used to support data sources willing to use just the capacity left available by all the other without any objective on CLR and CTD.

6. Define ATM adaptation layer (AAL)?
A collection of standardized protocols that provide services to higher layers by adapting user traffic to a cell format.

7. Define AAL1 (AAL type 1)?
An AAL used for the transport of constant bit rate (CBR) traffic (ie. Audio and video) and for emulating TDM based circuits.

8. Define AAL2 (AAL type2)?
An AAL used for supporting time dependent variable bit rate (VBR-RT) connection oriented traffic (ie.packetized video and audio).

9.What is AAL3/4(AAL type 3 and 4)?
An AAL used for supporting both connectionless and connection oriented variable bit rate (VBR) traffic.It is also used to support SMDS.


10.What is AAL5 (AAL type5)?
The most common AAL type used for the transport of data packets.


11. Define ATM?
A broadband switching and multiplexing, connection-oriented, high performance and cost effective integrated technology for supporting BISDN services.

12. What are the features of SDH?
1. Provision of single worldwide transmission network
2. Easy multiplexing and demultiplexing
3. Flexibility in adapting internal signal structure
4. Provision of operation and maintenance functions.


13. What are the layers present in SDH?
1. Circuit layer
2.path layer
3.transmission layer


14. Give the SDH multiplexing elements?
Container, virtual container, tributary unit, tributary unit group, administrative unit, administrative unit group, synchronous transport module.

15. What is meant by floating mode of multiplexing?
Pointer information allows a VC to float within its TU is called mode of multiplexing.


16. What are the elements present in VC?
A VC consists of a Container and the path overhead processed in the SDH
multiplexer.


17. What are the functions of a tributary unit group?
It performs the function of assembling together several TU’s without further overhead.

18. What is path overhead?
The header needed to perform the functions at the path layer is path overhead.


19. What is the need for plesiochronous digital hierarchy?
The need is to develop a step-by-step hierarchical multiplexing in which higher level multiplexing are needed.

20. What is SS7?
SS7 defines a signaling network features and the protocol architecture of the common channel signaling used in ISDN.

UNIT II

1. Define switch?
A switch is simply a box with some number of ports that different devices such as workstations, routers and other switches attach to.

2. What are the techniques available to accomplish switch path control?
1. address learning
2. Spanning tree
3. Broadcast and discover
4.link state routing
5. explicit signaling.

3. Define VLAN?
VLAN is a broadcast domain whose members use LAN switching to communicate as if they shared the same physical segment.

4. What are the uses of VLAN?
VLAN are useful for administrative, security and broadcast control.


5. What are the two internal forwarding techniques used in LAN switch?
1. Cut through 2. Store and forward


6. What is cut through forwarding?
A switch begins to forward the packet as soon as the destination address is examined and verified. The forwarding of the first path of the packet can begin even as the remainder of the packet is being read into the input port switch buffers

7. What are the advantages of using twisted pair star LAN?
1. Two wire system is susceptible to crosstalk and noise
2. A twisted pair can pass relatively wide range of frequencies.
3. Attenuation is in the range of 20db/mile at 500 khz
4. Transmission is not affected by interference.


8. What are the properties of VC connections?
Each VC is identified by a VC identifier. Cells belonging to the single message follow the same VC. Cells remain in the original order till they reach the destination.

9. What are the advantages of VLAN?
1. Configuration 2.Security 3.Network efficiency 4.Broadcast containment


10. How the Broadcast containment is possible in VLAN?
A properly configured and operational VLAN should prevent or minimize broadcast leakage from one VLAN to another.


11. What is meant by tag control information (TCI)?
The TCI consists of a three bit user priority field that is used to indicate the frames priority as it is forwarded through swithes supporting the IEEE 802.1P specification.

12.What is the need for the canonical format indicator(CFI)?
The one bit CFI indicates if the MAC address information is in canonical format.


13.Why switching is so popular?
Switching technologies offer much greater performance and capacity at much
lower price. Advances in silicon are placing more networks processing on expensive chips which prices down and boosts performance by orders of magnitude over older software based processing.

14.What is meant by LAN switching?
LAN switching is used to move data packets between workstations on the same or different segments.

15. What is meant by VAN switching?
VAN switching takes the form of a virtual connection that is provisioned between two end points such as a pair of routers.

16. What are the properties of switching?
1.operate at layer2 and below of any protocol stack 2. performed in hardware


17.Define switch forwarding?
The information available in the data packet and maintained in the switch enables the switch to rapidly move data packets from an input port to an output port.

18.What is the need for broadcast and discover technique?
It is commonly used in LAN switching and bridging to locate switched path through the network.

19..Define spanning tree explorer(STE)?
If the spanning tree is in place the explorer packet may be opt to follow the spanning tree path to the destination is called as STE.

20.What is the need for the connection identifier(CI)?
CI contained in the packet is used to determine the output port .CI is also called as label.

21.Define all routers explorer(ARE)?
If the explorer packet is flooded through out the entire network is called as ARE.

UNIT III

1.Define non blocking?
If an input output connection between an arbitrary idle inlet and outlet can be established by the network independent of the network state at setup time is called as non blocking.

2.Define blocking?
If atleast one I/O connection between an arbitrary idle inlet and outlet cannot be established by the network owing to internal congestion due to the already established I/O connections is called as blocking.

3. What are the types of non blocking network?
1.Strict sense non-blocking.
2.Wide sense non-blocking
3. Rearrangeable nonblocking.

4.What is the cost index of a cross bar network?
The cost index that is the number of cross points for a cross bar network is C=N^2.

5.What is meant by full connection?
If each matrix in stage i(i=1,2,………s-1) is connected to all the matrices in stages i-
1and i+1 is called as full connection.


6.What is meant by partial connection?
If each matrix in stage i(i=1,2……….s-1) is not connected to all the matrices in stages i-1 and i+1 is called as partial connections.

7.When two network are said to be isotropic?
Two network are said to be isotropic, if after relabelling the inlets,outlets and
the matrices of the first network with the respective labels of the second network, first network can be made identical to the second network by moving it’s matrices and correspondingly it’s attached links.

8.When the two network are said to be topologically equivalent?
Two network are topologically equivalent if an isomorphism holds between the underlying graphs of the two network

9.Define packet self routing property?
Each switching element(SE) is capable of routing autonomou sly the received packets to their destinations. such feature is known as self routing property.

10.What are the four types of network permutations in banyan network?
1.h-shuffle 2. h-unshuffle 3.butterfly permutation 4.identity
Permutation.

11.What is h-shuffle permutation?
The h-shuffle permutation consist in a circular left shift by one bit position of the h+1 least significant bit of the inlet address.

12. What is h-unshuffle permutation?
The h-unshuffle permutation consist in a circular right shift by one bit position of the h+1 least significant bit of the inlet address.

13. What are the two banyan network properties?
1.Buddy property
2.constrained reachable property.

14. What are the two algorithms to build merging networks?
1. Odd-even merging
2.Bitonic merging

15. Define Circular Bitonic Sequence?
Circular Bitonic Sequence is a sequence obtained shifting circularly the elements of a bitonic sequence by an arbitrary number of positions K.

16. What is slepian-Duguid theorem?
A three stage network is rearrangable if and only if r2>max (n, m).

17. Define partially self routing?
If packet self routing takes place only in the position of the network then it is called as partially self routing.

18. What are the four basic technique available for a partial connection multistage network?
1. Vertical replication (VR)
2. Vertical replication coupled with horizontal replication
3. Link dilation
4. EGS network.

19. What is the need for call processing?
Call processing whose task is to receive from the input port controller(IPC)
the virtual call request and to apply the appropriate algorithm to decide whether to accept or refuse the call.

20. Distinguish between blocking and non blocking network?
If an I/O connection between an arbitrary idle inlet and the outlet can be established by the network independent of the network state at set up time is called as non blocking.
If at least one I/O connection between an arbitrary idle inlet and the
outlet cannot be established by the network owing to internal congestion due to the already established I/O connection is called as blocking.

UNIT IV

1.What are the types of Queuing?
1. Input Queuing
2.Output Queuing
3.Shared Queuing

2. What are the three parameters used to describe the switching fabric performance?
1.Switch throughput
2.Average packet delay
3.Packet loss probability


3.Define switch throughput?
It is defined as the probability that a packet received on an input link is successfully switched and transmitted by the addressed switch output.

4. What is maximum throughput?
the maximum throughput also referred as the switch capacity indicates the load carried by the switch for an offered load _=1. 75. What is average packet delay? The average number of slots it takes for a packet received at a switch inlet to cross the network and thus to be transmitted downstream by the addressed switch outlet (T= 1).

5. What is packet loss probability?
Probability that a packet received at a switch input is lost due to buffer overflow
(0<p<=1).


6. What are the internal protocols available to enable the downstream transmission of packets?
1. Backpressure
2. Queue loss


7. What is back pressure?
Signals are exchanged between switching elements in adjacent stages so that the generic SE can grant a packet transmission to its upstream SE’s only within the current idle buffer capacity.

8. What are the types of back pressure?
1. Gobal back pressure
2. Local back pressure


9. Define local back pressure?
The number of buffer places that can be filled in the generic SE in stage i at slot t by upstream SE’s is simply given by the number of idle positions at the end of slot t-1.

10. Define global back pressure?
The number of buffer places that can be filled in the generic SE in stage i at
slot t by upstream SE’s is simply given by the number of idle positions at the end of slot t-1 increased by the number of packets that are going to be transmitted by the SE in the slot.

11. Define input queuing?
Cells addressing different switch outlets are stored at the switch input interface as long as there conflict-free switching through the inter connection network is possible.

12. Define output queuing?
Multiple cells addressing the same switch outlet are first switched through the interconnection network and then stored in the switch output while waiting to be transmitted down stream.

13. What is shared queuing?
The queuing capability shared by all switch input and output interfaces is available for all cells that cannot be switched immediately to the desired switch outlet.

14. What are the blocks involved in an N×M ATM switch?
1. N input port controller
2. Non blocking interconnection network
3. M output port controller


15. What are the assumptions made in an input queuing?
Bi> 0,Bo=Bs=0 and K=1


16.. What are the algorithms involved for an input queuing?
1. Three phase algorithm
2. Ring reservation algorithm

17. What are the phases present in three phase switch?
1. probe phase
2. Acknowledgement phase
3. data phase


18. What is signal latency in a network?
The number of bit times it takes for a signal to cross the network is called signal latency.

19. Why combined input and output queuing is necessary?
The combined architecture adopt a k-non blocking self routing multistage structure where the shared queue is removed. The virtual queue, input and output queue are mutually independent discrete time systems. In this queuing technique the number of cells entering the virtual queues in a slot approaches infinity and the queue joined by each cell is randomly and independently selected.

20. What is the assumption made in an output queuing?
Bo>0, Bi=Bs=0 and Output speed up K>1

21. What is cross bar tree switch?
Cross bar tree switch consists of a set of N planes each inter connecting a switch inlet to all the N output concentrators.

22. What is the assumption made in a shared queuing?
Bs>0,Bi=Bo=0 and K=1.

23. What is the need for an delay network in the starlite switch?
The recirculation or delay network of size P×P acts as a distributed shared
buffer and feeds back to the routing network up to P=N Bs packets that could not be switched in the preceding slot.

24. What are the blocks involved in a trap network?
1. Marker
2. Running adder winner
3. Running adder loser
4. Concentrator.

UNIT V

1. Define ARP?
A TCP/ IP protocol used for resolving local network addresses by mapping a physical address to an IP address is called ARP.

2. What are the classes in IP addressing?
1. Overlay model
2. Peer model.

3. What are applications of Address resolution server?
1. Maintains a table/cache of LAN or network layer addresses and associated
ATM addresses.
2. Maintains responds to queries for information from associated clients.

4. Define ATMARP?
ATMARP is a protocol and message formats that enable a client to request
and receive resolution of a destinations IP address with an ATM address from an
ATMARP server so that the client may establish an SVC to the destination.


5. What are the functions of ATMARP client?
1. Queries the ATMARP sever for address mappings and caches responses.
2. Establish SVCs to other devices on the same LIS


6. What is the need for ATMARP server?
1. Maintains a table of IP/ATM mappings
2. Responds to queries from ATMARP client
3. Run on a stand alone device or in a route server or router.


7. Define IP?
A networking protocol for providing a connectionless service to the higher transport protocol.

8 Define IP switch
A device or system that can forward IP packets at layer three and possesses a switching component that enables packets to be switched at layer two as well.

9. What is the function of an IP switch?
IP switch decides which packet will be forwarded at layer three and which will
be switched at layer two and then to redirect some or all packets over a layer two switched path.


10. Define logical address group?
A collection of hosts and routers connected to a physical NBMA network that is capable of establishing a short cut path with host and routers on different subnets.

11. Define LIS?
An IP subnet consisting of ATM attached devices that share a common address prefix and can communicate with each using ATM PVCs or SVCs.

12. What is the need for classical IP?
A protocol is developed for IP over ATM networks so that common applications can be supported in an ATM environment. The main issues for the transport of IP over ATM are packet encapsulation and the address resolution.

13. Define cell loss priority?
A 1-bit field in the ATM cell header that corresponds to the loss priority of a cell.

14. What is Multicast address Resolution Server?
An address resolution protocol that resolves IP multicast group address with
ATM addresses so that IP multicast can operate on top of an ATM network.


15. Define IP multicast?
IP network provides a service in which packets addressed to a group
address are delivered by routers to those networks with group members. A group membership protocol (IGMP) is used by hosts to tell routers which multicast group they wish to join/leave and the routers run a multicast routing protocol to build a delivery tree from source’s network out to all networks that have group members.

16. What is non Broadcast Multi-access Network?
A network that consists of devices attached to a common infrastructure but does not have any native broadcast capability.

17. What is payload?
IT is a part of ATM cell. It contains the actual information carried and occupies 48 bytes.

18. What is mean by peer model?
This model occurs when the network forwarding nodes operate on a single topology. This model supports a single IP topology and a single IP topology and a single IP address space.

19. Define topology driven IP switching?
An IP switching solution that builds a shortcut path based on the
presence of entries in a routing table. Examples are ARIS and Tag switching.

20. List out the properties of IPV6?
1. Improved addressing structure (128 bit address)
2. Improved security and authentication
3. Simplified header format
4. Flexible support for options.

21. What are the characteristics of Overlay model?
1. Uses separate addressing
2. Runs separate routing protocols at IP
3. Requires address resolution between IP and ATM and user network interfaces.
4. Uses virtual IP switches

22. What is MARS cluster?
A cluster is a group of ATM attached endpoints that use the same
MARS server to register their group membership information with and to receive group membership updates from.

23. Define cluster control VC?
The cluster control VC is a point to multipoint VC that is routed at the
MARS and branches out to all cluster members. It is used by the MARS server to distribute group membership.

24. What is MCS?
MCS serves as an intermediate point between the MARS senders and
the receivers. It is responsible for registering its ATM address along with the IP
multicast group address.


25. Define Holding time in NHRP?
Holding time is the amount of time that the information is contained in the Client Information Element (CLE) is considered valid.

CS2060-High Speed Networks - Question Bank

QUESTION BANK

SUBJECT NAME: CS2060 & HIGH SPEED NETWORKS

UNIT - I

HIGH SPEED NETWORKS (Introduction)

PART- A ( 2 marks)

1. What are the data link control functions provided by LAPF?

2. What are the main features of ATM?

3. What is virtual path identifier and Virtual connection identifier?

4. What is ATM ?

5. List the levels of fiber channel and the functions of each level?

6. What is meant by SAR and CS?

7. What is the difference between AAL3/4 and AAL3/5.

8. Draw the diagram for ATM layers?

9. Give the data rates for frame relay and X.25?

10. Define NIC and Ethernet.

PART - B

1. Explains the Frame relay architecture & compare it with x.25. (16)

2. a. Explain the ATM cell with a suitable diagram and explain Generic Flow

Control and Header error control. (8)

b. Explain varies ATM services. (8)

3. a. Discuss and compare the CPCS-PDU & SAR-PDU of AAL ¾ & AAL 5 (8)

b. Explain the architecture of AAL 1 (8)

4. Explain the architecture of 802.11 (16)

5. Explain the following:

a. Classical Ethernet (8)

b.IEEE 802.3 medium options at 10 Mbps (8)

6 a. Fast Ethernet (8)

b. gigabit Ethernet (8)

C.Explain Fiber channel Protocol architecture. (8)

UNIT- II

CONGESTION & TRAFFIC MANAGEMENT

PART- A ( 2 marks)

1. What is the role of DE lint in Frame relay?

2. How does frame relay report congestion?

3. Write Little’s formula.

4. Define Traffic intensity or utilization factor and QOS.

5. What is the difference between committed burst size (Bc) and Excess burst size (Be).

6. Define terms Router, Bridge and Gateway.

7. What is Bluetooth?

8. Distinguish between Poisson and Exponential formulae.

9. How we calculate the percentile of packets transfer at a time in traffic management technique.

10 Define Arrival rate and service rate.

PART - B

1. Explain the single- server and multi server queering models. (16)

2. At an ATM machine in a supermarket, the average length of a transaction is 2 minutes,and on average, customers arrive to use the machine once every 5 minutes, How long is the average time that a person must spend waiting and using the machine? What is the 90th percentile of residence time? On average, how many people are waiting to use the machine? Assume M/M/1. .(16)

3. Consider a frame relay node that is handling a Poisson stream of incoming frames to betransmitted on a particular 1 – Mbps outgoing link. The stream consists of two types of frames. Both types pf frames have the same exponential distribution of frame length with a mean of 1000 bits.

a. Assume that priorities are not used. The combined arrival rate of frame of both types is 800 frames/second. What is the mean residences time (Tr) for all frames?

b. Now assume that the two types are assigned different priorities, with the arrival rate of type 1 of 200 frames/second and the arrival rate of type 2 of 600 frames/second. Calculate

the mean residence time for type 1, type2, and overall.

c. Repeat (b) for _1 = _2 = 400 frames/second.

d. Repeat (b) for _1 = 600 frames/second and _2 = 200 frames/second. . (16)

4. Messages arrive at a switching center for a particular outgoing communications line in a poisson manner with a mean arrival rate of 180 messages per hour. Message length is distributed exponentially with a mean length of 14,400 characters. Line speed is 9600 bps.

a. What is the mean waiting time in the switching center? (6)

b. How many messages will be waiting in the switching center for transmission on the average? (10)

5. a.Explain the effects of congestion. (8)

b. Explain the congestion control mechanisms in networks. (8)

UNIT – III

TCP AND ATM CONGESTION CONTROL

PART- A ( 2 marks)

1. Define the relationship between through put and TCP window size W.

2. Why is retransmission strategy essential in TCP?

3. What are the types of retransmit policy?

4. Why congestion control in a TCP/IP-based internet is complex.

5. Define cell delay variation.

6. Define CBR 8 ABR.

7. What are the advantages of sliding window protocol

PART - B

1 a. Explain TCP flow & congestion control. (10)

b.Explain the Retransmissions Timer management techniques. (6)

2. Explain the five important window management techniques. (16)

3. a Explain the congestion control mechanism in ATM networks carrying TCP traffic. (10)

b.Explain the ATM traffic control (6)

4. a. What are the requirements for ATM traffic and congestion control? (10)

b. Explain the ATM traffic – related attributes. (6)

5 a.. Explain in detail ABR traffic management. (8)

b. Explain in detail GFR traffic management. (8)

UNIT- IV

INTEGRATED AND DIFFERENTIATED SERVICES

PART- A ( 2 marks)

1. What are the requirements for inelastic traffic?

2. State the drawbacks of FIFO queering discipline.?

3. What is global synchronization?

4. Distinguish between inelastic and elastic traffic.?

5. Define the format of DS field.?

PART - B

1. Explain the block diagram for Integrated Services Architecture. and give details about

components (16)

2.a. Explain the services offered by ISA (8)

b.Define Differentiated services. (8)

3. Explain the various queering disciplines in ISA. (16)

4. Explain the RED algorithm. (16)

5. Explain the various types of Traffic. (16)

UNIT-V

PROTOCOLS FOR QOS SUPPORT

PART- A ( 2 marks)

1. What are the reservations attributes and styles in RSVP.

2. Define Forwarding equivalence class (FEC).

3. Define MPLS label format in RSVP.

4. Compare hop – lug – hop routing and explicit routing.

5. Define the format of RTP header.

PART - B

1.a. Explain the characteristics of RSVP & the types of data flow. (8)

b. Explain the RSVP operation and protocol mechanisms. (8)

2. Explain the operation of multi protocol label switching. (16)

3 a. Explain the RTP protocol architecture. (8)

b. Explain the RTP data transfer protocol. (8)

4. Explain the MPLS characteristics and advantages. (16)

***ALL THE BEST*****

CS2259 Microprocessors Laboratory - Syllabus

CS2259 MICROPROCESSORS LABORATORY

(Common to CSE & IT)

L T P C

0 0 3 2

AIM:

ü  To learn the assembly language programming of 8085,8086 and 8051 and also to give a practical training of interfacing the peripheral devices with the processor.

OBJECTIVES:

Ø  To implement the assembly language programming of 8085,8086 and 8051.

Ø  To study the system function calls like BIOS/DOS.

Ø  To experiment the interface concepts of various peripheral device with the processor.

Experiments in the following:

1. Programming with 8085

2. Programming with 8086-experiments including BIOS/DOS calls: Keyboard control, Display, File Manipulation.

3. Interfacing with 8085/8086-8255,8253

4. Interfacing with 8085/8086-8279,8251

5. 8051 Microcontroller based experiments for Control Applications

6. Mini- Project

TOTAL: 45 PERIODS

List of equipments/components for 30 students (two per batch)

1. 8085 Trainer Kit with onboard 8255, 8253, 8279 and 8251 – 15 nos.

2. TASM/MASM simulator in PC (8086 programs) – 30 nos.

3. 8051 trainer kit – 15 nos.

4. Interfacing with 8086 – PC add-on cards with 8255, 8253, 8279 and 8251 – 15 nos.

5. Stepper motor interfacing module – 5 nos.

6. Traffic light controller interfacing module – 5 nos.

7. ADC, DAC interfacing module – 5 nos.

8. CRO’s – 5 nos.

CS 2255 Database Management Systems - Syllabus

CS 2255 DATABASE MANAGEMENT SYSTEMS

(Common to CSE & IT)

L T P C

3 0 0 3

UNIT I           INTRODUCTION               9

Purpose of Database System -– Views of data – Data Models – Database Languages ––

Database System Architecture – Database users and Administrator – Entity–

Relationship model (E-R model ) – E-R Diagrams -- Introduction to relational databases

UNIT II          RELATIONAL MODEL   9

The relational Model – The catalog- Types– Keys - Relational Algebra – Domain

Relational Calculus – Tuple Relational Calculus - Fundamental operations – Additional

Operations- SQL fundamentals - Integrity – Triggers - Security – Advanced SQL

features –Embedded SQL– Dynamic SQL- Missing Information– Views – Introduction

to Distributed Databases and Client/Server Databases

UNIT III        DATABASE DESIGN        9

Functional Dependencies – Non-loss Decomposition – Functional Dependencies – First,

Second, Third Normal Forms, Dependency Preservation – Boyce/Codd Normal Form-

Multi-valued Dependencies and Fourth Normal Form – Join Dependencies and Fifth

Normal Form

UNIT IV        TRANSACTIONS                9

Transaction Concepts - Transaction Recovery – ACID Properties – System Recovery –

Media Recovery – Two Phase Commit - Save Points – SQL Facilities for recovery –

Concurrency – Need for Concurrency – Locking Protocols – Two Phase Locking –

Intent Locking – Deadlock- Serializability – Recovery Isolation Levels – SQL Facilities

for Concurrency.

UNIT V          IMPLEMENTATION TECHNIQUES    9

Overview of Physical Storage Media – Magnetic Disks – RAID – Tertiary storage – File

Organization – Organization of Records in Files – Indexing and Hashing –Ordered

Indices – B+ tree Index Files – B tree Index Files – Static Hashing – Dynamic Hashing –

Query Processing Overview – Catalog Information for Cost Estimation – Selection

Operation – Sorting – Join Operation – Database Tuning.

TOTAL :45 PERIODS

TEXT BOOKS:

1. Abraham Silberschatz, Henry F. Korth, S. Sudharshan, “Database System

Concepts”, Fifth Edition, Tata McGraw Hill, 2006 (Unit I and Unit-V) .

2. C.J.Date, A.Kannan, S.Swamynathan, “An Introduction to Database Systems”,

Eighth Edition, Pearson Education, 2006.( Unit II, III and IV)

REFERENCES:

1. Ramez Elmasri, Shamkant B. Navathe, “Fundamentals of Database Systems”,

FourthEdition , Pearson / Addision wesley, 2007.

2. Raghu Ramakrishnan, “Database Management Systems”, Third Edition, McGraw

Hill, 2003.

3. S.K.Singh, “Database Systems Concepts, Design and Applications”, First Edition,

Pearson Education, 2006.

CS 2253 - Computer Organization and Architecture - Syllabus

CS 2253 COMPUTER ORGANIZATION AND ARCHITECTURE

(Common to CSE & IT)

 L T P C

3 0 0 3

UNIT I           BASIC STRUCTURE OF COMPUTERS 9

Functional units – Basic operational concepts – Bus structures – Performance and metrics – Instructions and instruction sequencing – Hardware – Software Interface – Instruction set architecture – Addressing modes – RISC – CISC. ALU design – Fixed point and floating point operations.

UNIT II          BASIC PROCESSING UNIT        9

Fundamental concepts – Execution of a complete instruction – Multiple bus organization

– Hardwired control – Micro programmed control – Nano programming.

UNIT III        PIPELINING            9

Basic concepts – Data hazards – Instruction hazards – Influence on instruction sets –

Data path and control considerations – Performance considerations – Exception

handling.

UNIT IV        MEMORY SYSTEM          9

Basic concepts – Semiconductor RAM – ROM – Speed – Size and cost – Cache

memories – Improving cache performance – Virtual memory – Memory management

requirements – Associative memories – Secondary storage devices.

UNIT V          I/O ORGANIZATION         9

Accessing I/O devices – Programmed Input/Output -Interrupts – Direct Memory Access

– Buses – Interface circuits – Standard I/O Interfaces (PCI, SCSI, USB), I/O devices and

processors.

TOTAL: 45 PERIODS

TEXT BOOK:

1. Carl Hamacher, Zvonko Vranesic and Safwat Zaky, “Computer Organization”, Fifth

Edition, Tata McGraw Hill, 2002.

REFERENCES:

1. David A. Patterson and John L. Hennessy, “Computer Organization and Design: The

Hardware/Software interface”, Third Edition, Elsevier, 2005.

2. William Stallings, “Computer Organization and Architecture – Designing for

Performance”, Sixth Edition, Pearson Education, 2003.

3. John P. Hayes, “Computer Architecture and Organization”, Third Edition, Tata

McGraw Hill, 1998.

4. V.P. Heuring, H.F. Jordan, “Computer Systems Design and Architecture”, Second

Edition, Pearson Education, 2004.

CS2252-Microprocessors and Microcontrollers - Syllabus

CS2252 MICROPROCESSORS AND MICROCONTROLLERS

(Common to CSE & IT)

L T P C

3 0 0 3

UNIT I           THE 8085 AND 8086 MICROPROCESSORS     9

8085 Microprocessor architecture-Addressing modes- Instruction set-Programming the 8085

UNIT II          8086 SOFTWARE ASPECTS       9

Intel 8086 microprocessor - Architecture - Signals- Instruction Set-Addressing Modes-

Assembler Directives- Assembly Language Programming-Procedures-Macros-Interrupts

And Interrupt Service Routines-BIOS function calls.

UNIT III        MULTIPROCESSOR CONFIGURATIONS       9

Coprocessor Configuration – Closely Coupled Configuration – Loosely Coupled

Configuration –8087 Numeric Data Processor – Data Types – Architecture –8089 I/O

Processor –Architecture –Communication between CPU and IOP.

UNIT IV        I/O INTERFACING                                                 9

Memory interfacing and I/O interfacing with 8085 – parallel communication interface –

serial communication interface – timer-keyboard/display controller – interrupt controller –

DMA controller (8237) – applications – stepper motor – temperature control.

UNIT V          MICROCONTROLLERS               9

Architecture of 8051 Microcontroller – signals – I/O ports – memory – counters and

timers – serial data I/O – interrupts- Interfacing -keyboard, LCD,ADC & DAC

TOTAL: 45 PERIODS

TEXT BOOKS:

1. Ramesh S. Gaonkar ,”Microprocessor – Architecture, Programming and Applications

with the 8085” Penram International Publisher , 5th Ed.,2006

2. Yn-cheng Liu,Glenn A.Gibson, “Microcomputer systems: The 8086 / 8088 Family

architecture, Programming and Design”, second edition, Prentice Hall of India , 2006.

3. Kenneth J.Ayala, ’The 8051 microcontroller Architecture, Programming and

applications‘ second edition ,Penram international.

REFERENCES:

1. Douglas V.Hall, “ Microprocessors and Interfacing : Programming and Hardware”,

second edition , Tata Mc Graw Hill ,2006.

2. A.K.Ray & K.M Bhurchandi, “Advanced Microprocessor and Peripherals –

Architecture, Programming and Interfacing”, Tata Mc Graw Hill , 2006.

3. Peter Abel, “ IBM PC Assembly language and programming” , fifth edition, Pearson

education / Prentice Hall of India Pvt.Ltd,2007.

4. Mohamed Ali Mazidi,Janice Gillispie Mazidi,” The 8051 microcontroller and

embedded systems using Assembly and C”,second edition, Pearson education

/Prentice hall of India , 2007.

CS 2251 DESIGN AND ANALYSIS OF ALGORITHMS - Syllabus

CS 2251 DESIGN AND ANALYSIS OF ALGORITHMS - Syllabus

L T P C

3 1 0 4

UNIT I                       9

Algorithm Analysis – Time Space Tradeoff – Asymptotic Notations – Conditional

asymptotic notation – Removing condition from the conditional asymptotic notation -

Properties of big-Oh notation – Recurrence equations – Solving recurrence equations –

Analysis of linear search.

UNIT II          9

Divide and Conquer: General Method – Binary Search – Finding Maximum and Minimum

– Merge Sort – Greedy Algorithms: General Method – Container Loading – Knapsack

Problem.

UNIT III        9

Dynamic Programming: General Method – Multistage Graphs – All-Pair shortest paths –

Optimal binary search trees – 0/1 Knapsack – Travelling salesperson problem .

UNIT IV        9

Backtracking: General Method – 8 Queens problem – sum of subsets – graph coloring –

Hamiltonian problem – knapsack problem.

UNIT V          9

Graph Traversals – Connected Components – Spanning Trees – Biconnected

components – Branch and Bound: General Methods (FIFO & LC) – 0/1 Knapsack

problem – Introduction to NP-Hard and NP-Completeness.

TUTORIAL= 15, TOTAL: 60 PERIODS

TEXT BOOKS:

1. Ellis Horowitz, Sartaj Sahni and Sanguthevar Rajasekaran, Computer Algorithms/

C++, Second Edition, Universities Press, 2007. (For Units II to V)

2. K.S. Easwarakumar, Object Oriented Data Structures using C++, Vikas Publishing

House pvt. Ltd., 2000 (For Unit I)

REFERENCES:

1. T. H. Cormen, C. E. Leiserson, R.L.Rivest, and C. Stein, "Introduction to Algorithms",

Second Edition, Prentice Hall of India Pvt. Ltd, 2003.

2. Alfred V. Aho, John E. Hopcroft and Jeffrey D. Ullman, "The Design and Analysis of

Computer Algorithms", Pearson Education, 1999.